1. Technical Field
The descriptions herein relate to a semiconductor memory apparatus, particularly a data output circuit in a semiconductor memory apparatus.
2. Related Art
In general, an advanced semiconductor memory apparatus, such as DDR SDRAM (Double Data Rate SDRAM) has improved input/output speed by inputting/outputting data in synchronization with a rising edge and a falling edge of an external clock signal. Accordingly, the semiconductor memory apparatus generates a clock signal (hereafter, rising clock signal) that is enabled on a rising edge of an external clock signal and a clock signal (hereafter, a falling clock signal) that is enabled on a falling edge of the external clock signal, and using a DLL (Delay Locked Loop) circuit in outputting data.
The semiconductor memory apparatus outputs data at a high speed by storing a plurality of data (hereafter, rising data) that is output when the rising clock signal is enabled and a plurality of data (hereafter, falling data) that is output when the falling clock signal is enabled and outputting sequentially the stored data using a pipe register.
Such a conventional semiconductor memory apparatus includes a plurality of data buffers and a plurality of data strobe clock signal buffers. The data buffers and the data strobe clock signal buffers make the output timings of the output data and the data strobe clock signals correspond with each other, respectively, using the rising clock signal and the falling clock signal. However, a large number of data buffers and data strobe clock signal buffers, which operate as described above, are disposed in a data output circuit. Therefore, when the data buffers and the data strobe buffers simultaneously operate at a certain time, the amount of power that is used by the data output circuit increases considerably. This phenomenon increases the entire power noise and reduces the power efficiency of the semiconductor memory apparatus. Research related to operating a semiconductor memory apparatus using low power has been increasing, such that the above problem, which had not been significantly considered previously, is now realized to be an important factor for the power efficiency of semiconductor memory apparatus.